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19-3046; Rev 2; 6/04
KIT ATION EVALU E AILABL AV
Two-Switch Power ICs with Integrated Power MOSFETs and Hot-Swap Controller
General Description Features
Reliable Single-Stage Clamped Two-Switch Power ICs for High Efficiency No Reset Winding Required Up to 50W Output Power Integrated High-Voltage 75m Power MOSFETs 20V to 76V Wide Input Voltage Range Feed-Forward Voltage or Current-Mode Control Programmable Brownout Undervoltage Lockout Integrated Current Signal Amplifier for HighEfficiency, Current-Mode Control Internal Overtemperature Shutdown Indefinite Short-Circuit Protection Integrated Thermally Protected High-Voltage Startup Linear Regulator Integrated Hot-Swap Controller (MAX5042) Integrated Look-Ahead Signal Output Drives High-Speed Optocoupler for Secondary-Side Synchronous Rectification >90% Efficiency with Synchronous Rectification Up to 500kHz Switching Frequency High-Power, Small-Footprint 56-Pin Thermally Enhanced QFN Package
MAX5042/MAX5043
The MAX5042/MAX5043 isolated multimode PWM power ICs feature integrated switching power MOSFETs connected in a voltage-clamped, two-transistor, power-circuit configuration. These devices operate from a wide 20V to 76V input voltage range. The MAX5042 includes a hotswap controller for use with an external power MOSFET to limit inrush current for applications where the power supply is plugged into a live power backplane. The MAX5043 does not include a hot-swap controller. The voltage-clamped power topology of the MAX5042/ MAX5043 enables full recovery of stored magnetizing and leakage inductive energy for enhanced efficiency and reliability. Operating at up to 500kHz switching frequency, these devices provide up to 50W of output power. The MAX5042/MAX5043 allow the implementation of both forward and flyback voltage or current-mode converter topologies. A dedicated latched external shutdown provides protection in addition to internal thermal shutdown. The MAX5042/MAX5043 achieve higher efficiency when used with secondary-side synchronous rectification. These devices generate a look-ahead signal for driving secondary-side synchronous rectifiers. The MAX5042/MAX5043 are rated for operation over the -40C to +125C and -40C to +85C temperature range, respectively, and are available in a small surfacemount 56-pin thin QFN package. Warning: The MAX5042/MAX5043 are designed to work with high voltages. Exercise caution.
Applications
High-Efficiency Telecom/Datacom Power Supplies Router/Switch Cards with 48V Backplane Power Systems Servers with 48V Backplane Power Systems xDSL Line Cards xDSL Line-Driver Power Supplies Distributed Power Systems with 48V Bus 42V Automotive Power Supplies Power-Supply Modules
MAX5042 PART PART MAX5042ATN MAX5043ETN
Ordering Information
TEMP RANGE -40C to +125C -40C to +85C PIN-PACKAGE 56 Thin QFN 56 Thin QFN
Selector Guide
DESCRIPTION Two-Switch Power IC with Integrated Power MOSFETs and Hot-Swap Controller for Isolated Power Supplies Two-Switch Power IC with Integrated Power MOSFETs for Isolated Power Supplies
MAX5043
Pin Configurations appear at end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
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Two-Switch Power ICs with Integrated Power MOSFETs and Hot-Swap Controller MAX5042/MAX5043
ABSOLUTE MAXIMUM RATINGS
(See the Absolute Maximum Ratings Diagram below to better understand the absolute maximum ratings of the various blocks.) PWMNEG, POSINPWM, DRNH, XFRMRH, XFRMRL, SRC to NEGIN....................-0.3V to +80V BST to NEGIN.........................................................-0.3V to +95V BST to XFRMRH .....................................................-0.3V to +12V SRC to PWMNEG .....................................................-0.3V to +6V REG15 to PWMNEG ...............................................-0.3V to +40V REG15 to POSINPWM ............................................-80V to +0.3V REG9, DRVIN to PWMNEG ....................................-0.3V to +12V REG5 to PWMNEG ...................................................-0.3V to +6V REG15 Current..................................................................80mA REG9 Current......................................................................40mA REG5 Current......................................................................20mA UVLO, RAMP, CSS, FLTINT, CSOUT, RCFF, RCOSC to PWMNEG ...............................-0.3V to +12V OPTO, PWMSD, SYNC, CSP, CSN, DRVDEL to PWMNEG...........................................-0.3V to +6V PPWM to PWMNEG .................................-0.3V to (REG5 + 0.3V) PPWM Current .................................................................20mA PWMPNEG to PWMNEG .......................................-0.3V to +0.3V DRNH Continuous Average Current (all pins combined) TJ = +125C.........................................................................2A TJ = +150C......................................................................1.4A XFRMRH Continuous Average Current (all pins combined) TJ = +125C.........................................................................2A TJ = +150C......................................................................1.4A XFRMRL Continuous Average Current (all pins combined) TJ = +125C.........................................................................2A TJ = +150C......................................................................1.4A SRC Continuous Current (all pins combined) TJ = +125C.........................................................................2A TJ = +150C......................................................................1.4A POSINHS to NEGIN................................................-0.3V to +80V HSEN to NEGIN........................................................-0.3V to +4V DEN to PWMNEG .....................................................-0.3V to +4V HSGATE to NEGIN .................................................-0.3V to +12V HSDRAIN, HSOK to NEGIN....................................-0.3V to +80V HSOK Current .....................................................................20mA Continuous Power Dissipation (TA = +70C) 56-Pin Thin QFN (derate 47.6mW/C above +70C) .......3.8W Junction to Ambient Thermal Resistance, JA ...............+21C/W Operating Temperature Range MAX5042ATN ................................................-40C to +125C MAX5043ETN ..................................................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Absolute Maximum Ratings Diagram
POSINHS, POSINPWM BST 12V XFRMRH, DRNH XFRMRL
REG15 80V 80V 80V 40V 12V 6V 4V DEN PWMNEG, PWMPNEG, HSDRAIN, HSOK HSGATE HSEN 4V IC SUBSTRATE, NEGIN 80V REG5, OPTO, PWMSD, SYNC, CSP, CSN, DRVDEL, SRC, PPWM 80V 95V REG9, UVLO, RAMP, CSS, FLTINT, CSOUT, RCFF, RCOSC, DRVIN
80V 12V
2
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Two-Switch Power ICs with Integrated Power MOSFETs and Hot-Swap Controller
ELECTRICAL CHARACTERISTICS
(VPOSINPWM = 20V to 76V, VREG15 = 18V, CREG15 = 4.7F, CREG9 = 1F, CREG5 = 1F, RRCOSC = 24k, CRCOSC = 100pF, CBST = 0.22F, RDRVDEL = 10k, CDRVDEL = 0.22F, VCSS = VCSP = VCSN = VRAMP = VPWMNEG = VNEGIN = 0, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VPOSINPWM = 48V, TA = +25C, unless otherwise noted. All voltages are referred to PWMNEG, unless otherwise noted.)
PARAMETER Input Supply Range REG15 REGULATOR REG15 Output Voltage Range REG15 Output Voltage Load Regulation REG15 Output Current REG15 Current Limit REG15 Overdrive Voltage REG9 REGULATOR REG9 Output Voltage Range REG9 Output Voltage Load Regulation REG9 Output Current REG9 Current Limit REG5 REGULATOR REG5 Output Voltage Range REG5 Output Voltage Load Regulation REG5 Output Current REG5 Current Limit PWM COMPARATOR Common-Mode Range Input Offset Voltage Input Bias Current Propagation Delay RCOSC OSCILLATOR PWM Period Maximum Duty Cycle Maximum RCOSC Frequency RCOSC Peak Trip Level RCOSC Valley Trip Level RCOSC Input Bias Current RCOSC Discharge MOSFET RDS(ON) RCOSC Discharge Pulse Width SYNC High Level SYNC Low Level 3.5 0.8 Sinking 10mA fRCOSC VTH tOSC-PWM 3.9 47 1.2 2.55 0.2 -0.3 60 50 120 s % MHz V V A ns V V 50mV overdrive, 0 VCM-PWM 5.5V -2.5 70 VCM-PWM 0 10 +2.5 5.5 V mV A ns VREG15 = 18V to 40V IREG5 = 0 to 20mA Inferred from load regulation test REG5 shorted to PWMNEG with 10 40 4.5 5.5 0.35 20 V V mA mA VREG15 = 18V to 40V IREG9 = 0 to 40mA Inferred from load regulation test REG9 shorted to PWMNEG with 10 100 8.3 10.1 0.35 40 V V mA mA VREG15 VPOSINPWM = 20V to 76V VPOSINPWM = 20V, IREG15 = 0 to 80mA Inferred from load regulation test REG15 shorted to PWMNEG with 10 18 140 40 13.0 16.6 1.5 80 V V mA mA V SYMBOL VPOSINPWM CONDITIONS MIN 20 TYP MAX 76 UNITS V
MAX5042/MAX5043
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Two-Switch Power ICs with Integrated Power MOSFETs and Hot-Swap Controller MAX5042/MAX5043
ELECTRICAL CHARACTERISTICS (continued)
(VPOSINPWM = 20V to 76V, VREG15 = 18V, CREG15 = 4.7F, CREG9 = 1F, CREG5 = 1F, RRCOSC = 24k, CRCOSC = 100pF, CBST = 0.22F, RDRVDEL = 10k, CDRVDEL = 0.22F, VCSS = VCSP = VCSN = VRAMP = VPWMNEG = VNEGIN = 0, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VPOSINPWM = 48V, TA = +25C, unless otherwise noted. All voltages are referred to PWMNEG, unless otherwise noted.)
PARAMETER SYNC Leakage Current SYNC Maximum Frequency SYNC On-Time SYNC Off-Time PWM LOGIC PWM Comparator Propagation Delay PPWM to XFRMRL Delay DRVDEL Reference Voltage PPWM Output High PPWM Output Low PWMSD Logic High PWMSD Logic Low PWMSD Leakage Current SOFT-START Soft-Start Current Minimum OPTO Voltage RAMP GENERATOR Minimum RCFF Voltage RCFF Leakage OVERLOAD FAULT FLTINT Pulse Current FLTINT Trip Point FLTINT Hysteresis INTERNAL POWER FETs On-Resistance Off-State Leakage Current Total Gate Charge Per FET HIGH-SIDE DRIVER Low-to-High Latency High-to-Low Latency Output Drive Voltage LOW-SIDE DRIVER Low-to-High Latency Driver delay until FET VGS reaches 0.9 x VDRVIN 80 ns Driver delay until FET VGS reaches 0.9 x (VBST - VXFRMRH) Driver delay until FET VGS reaches 0.1 x (VBST - VXFRMRH) BST to XFRMRH with high side on 80 45 8 ns ns V Inferred from supply current with VDS = 50V 45 RDSON VDRVIN = VBST = 9V, VXFRMRH = VSRC = 0, IDS = 190mA 75 200 10 m A nC IFLTINT 2.0 80 2.7 0.75 3.5 A V V RCFF sinking 2mA 2.1 0.1 1 V A ICSS CSS = 0, sinking 2mA 33 1.4 A V Sourcing 2mA Sinking 2mA 3.5 0.8 1 PPWM rising 1.14 2.8 0.4 70 120 1.38 ns ns V V V V V A fSYNC 50 200 2.4 SYMBOL CONDITIONS MIN TYP MAX 1 UNITS A MHz ns ns
4
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Two-Switch Power ICs with Integrated Power MOSFETs and Hot-Swap Controller
ELECTRICAL CHARACTERISTICS (continued)
(VPOSINPWM = 20V to 76V, VREG15 = 18V, CREG15 = 4.7F, CREG9 = 1F, CREG5 = 1F, RRCOSC = 24k, CRCOSC = 100pF, CBST = 0.22F, RDRVDEL = 10k, CDRVDEL = 0.22F, VCSS = VCSP = VCSN = VRAMP = VPWMNEG = VNEGIN = 0, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VPOSINPWM = 48V, TA = +25C, unless otherwise noted. All voltages are referred to PWMNEG, unless otherwise noted.)
PARAMETER High-to-Low Latency CURRENT-SENSE COMPARATOR Current-Limit-Comparator Threshold Voltage Current-Limit-Comparator Propagation Delay CURRENT-SENSE AMPLIFIER Current Amplifier Gain Input Voltage Offset Input Common-Mode Range Input Differential-Mode Range CSP Input Bias Current CSN Input Bias Current Settling Time 3dB Bandwidth BOOST VOLTAGE CIRCUIT QB RDS(ON) Driver Output Delay One-Shot Pulse Width THERMAL SHUTDOWN Shutdown Temperature Thermal Hysteresis PWM CONVERTER UNDERVOLTAGE LOCKOUT (UVLO) Preset UVLO Threshold UVLO Threshold Hysteresis UVLO Resistance UVLO Trip Point UVLO Hysteresis Preset DEN Threshold DEN Threshold Hysteresis DEN Startup Delay DEN Turn-Off Delay DEN Trip Point MAX5043 only, measured at POSINPWM rising MAX5043 only MAX5043 only MAX5043 only MAX5043 only, rising with respect to PWMNEG 3.5 0.2 1.11 27 3.1 12 0.7 27.0 1.5 1.35 Looking into UVLO Measured at UVLO rising 30 1.15 1.27 +127 34 Measured at POSINPWM rising 28 31 3 75 1.39 34 V V k V mV V V ms ms V Temperature rising 150 14.5 C C Sinking 100mA 10 200 300 20 ns ns Inferred from current amplifier gain test VCSP = -0.3V to +0.3V, VCSN = 0 VCSP = -0.3V to +0.3V, VCSN = 0 VCSN = 0, VCSP steps from 0 to 0.2V, 10% settling time, CL = 20pF -160 -160 70 7 VCSN = 0, VCSP = 0 to 0.35V VCN = VCSP = -0.3V to +0.3V 9.75 185 -0.3 10 200 10.25 230 +0.3 0.35 -40 -30 V/V mV V V A A ns MHz 10mV overdrive 140 156 40 172 mV ns SYMBOL CONDITIONS Driver delay until FET VGS reaches 0.1 x VDRVIN MIN TYP 45 MAX UNITS ns
MAX5042/MAX5043
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Two-Switch Power ICs with Integrated Power MOSFETs and Hot-Swap Controller MAX5042/MAX5043
ELECTRICAL CHARACTERISTICS (continued)
(VPOSINPWM = 20V to 76V, VREG15 = 18V, CREG15 = 4.7F, CREG9 = 1F, CREG5 = 1F, RRCOSC = 24k, CRCOSC = 100pF, CBST = 0.22F, RDRVDEL = 10k, CDRVDEL = 0.22F, VCSS = VCSP = VCSN = VRAMP = VPWMNEG = VNEGIN = 0, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VPOSINPWM = 48V, TA = +25C, unless otherwise noted. All voltages are referred to PWMNEG, unless otherwise noted.)
PARAMETER DEN Hysteresis DEN Input Resistance SUPPLY CURRENT From VPOSINHS = VPOSINPWM = 76V, CSS shorted to PWMNEG, REG15 = 18V From REG15 = 18V, VPOSINHS = VPOSINPWM = 76V, CSS shorted to PWMNEG From REG15 = 18V, VPOSINHS = VPOSINPWM = 76V, VDRNH = VXFRMRH = VXFRMRL = VSRC = 0V Standby Supply Current HOT-SWAP CONTROLLER (MAX5042 Only) Hot-Swap UVLO Threshold Hot-Swap UVLO Hysteresis Hot-Swap UVLO Resistance Startup Delay HSEN Turn-Off Delay HSOK Output-High Leakage Current HSEN Reference Threshold HSEN Hysteresis HSOK Output Low Voltage HSGATE Voltage High Hot-Swap Slew Rate CL = 10F, from HSDRAIN to NEGIN Sinking 5mA 7.5 10 Rising with respect to NEGIN 1.11 124 0.4 10.0 Looking into HSEN From HSEN rising to HSOK falling From HSEN falling to HSOK rising 18 50 3 165 10 POSINHS with respect to NEGIN, voltage rising 27 3.1 55 350 25 1 1.35 34 V V k ms ms A V mV V V V/ms MAX5042 only, VPOSINHS = VPOSINPWM = VPWMNEG = VPWMPNEG = VHSDRAIN = 76V, HSEN = NEGIN 2 3 SYMBOL MAX5043 only MAX5043 only, looking into DEN 18 CONDITIONS MIN TYP 124 55 MAX UNITS mV k
Supply Current
6
8.5
mA
20
0.6
1
mA
6
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Two-Switch Power ICs with Integrated Power MOSFETs and Hot-Swap Controller
Typical Operating Characteristics
(VPOSINPWM = 20V, TA = +25C, unless otherwise noted.)
MAX5042/MAX5043
HOT-SWAP UNDERVOLTAGE LOCKOUT THRESHOLD (V)
HOT-SWAP UNDERVOLTAGE LOCKOUT THRESHOLD vs. TEMPERATURE
MAX5042 toc01
HOT-SWAP STARTUP DELAY vs. TEMPERATURE
MAX5042 toc02
HOT-SWAP GATE VOLTAGE vs. INPUT VOLTAGE
MAX5042 toc03
32 31 30 29 28 27 26 -50 -25 0 25 50 75 100
175 HOT-SWAP STARTUP DELAY (ms)
8.73
VPOSINHS RISING
170
HOT-SWAP GATE VOLTAGE (V)
8.72
165
8.71
160
VPOSINHS FALLING
8.70
155
150 125 -50 -25 0 25 50 75 100 125 TEMPERATURE (C) TEMPERATURE (C)
8.69 20 30 40 50 60 70 80 INPUT VOLTAGE (V)
HOT-SWAP STARTUP WAVEFORM
MAX5042 toc04
PWM UNDERVOLTAGE LOCKOUT THRESHOLD vs. TEMPERATURE
VHSGATE 5V/div OV VHSDRAIN 20V/div OV VHSOK 20V/div OV PWM UVLO THRESHOLD (V)
MAX5042 toc05
32 31 30 29 28 27 26 -50 -25 0 25 50 75 100 VPOSINPWM FALLING VPOSINPWM RISING
100k PULLUP 10ms/div
125
TEMPERATURE (C)
POSINPWM INPUT CURRENT, REG15 INPUT CURRENT vs. TEMPERATURE
MAX5042 toc06
POSINPWM INPUT CURRENT, REG15 INPUT CURRENT vs. INPUT VOLTAGE
MAX5042 toc07
OPERATING FREQUENCY vs. TEMPERATURE
RRCOSC = 25k, CRCOSC = 100pF OPERATING FREQUENCY (kHz) 330 310 290 270 RRCOSC = 19k, CRCOSC = 100pF 250 230 80 -50 -25 0 25 50 75 100 125 TEMPERATURE (C)
MAX5042 toc08
6.0 5.5 SUPPLY CURRENT (mA) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 -50 -25 0 IPOSINPWM, VPOSINPWM = 76V VREG15 = 18V, CSS = 0, XFRMRH = 0, NO SWITCHING 25 50 75 100 IREG15, VPOSINPWM = 76V
6 IREG15 5 SUPPLY CURRENT (mA) 4 3 IPOSINPWM 2 1 0 20 30 40
350
VREG15 = 18V, CSS = 0, XFRMRH = 0, NO SWITCHING 50 60 70
125
TEMPERATURE (C)
INPUT VOLTAGE (V)
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Two-Switch Power ICs with Integrated Power MOSFETs and Hot-Swap Controller MAX5042/MAX5043
Typical Operating Characteristics (continued)
(VPOSINPWM = 20V, TA = +25C, unless otherwise noted.)
MAXIMUM DUTY CYCLE vs. TEMPERATURE
MAX5042 toc09
REG15 VOLTAGE vs. REG15 LOAD CURRENT
MAX5042 toc10
REG15 VOLTAGE vs. INPUT VOLTAGE
MAX5042 toc11
50
15.0
15.0 14.9 14.8
MAXIMUM DUTY CYCLE (%)
14.8
49 VREG15 (V) VREG15 (V) 0 20 40 60 80 14.6
14.7 14.6 14.5
48
14.4
47 MEASURED AT XFRMRL 46 -50 -25 0 25 50 75 100 125 TEMPERATURE (C)
14.2 14.4 14.0 REG15 LOAD CURRENT (mA) 14.3 20 30 40 50 60 70 80 INPUT VOLTAGE (V)
REG9 VOLTAGE vs. REG9 LOAD CURRENT
MAX5042 toc12
REG9 OUTPUT VOLTAGE vs. REG15 VOLTAGE
MAX5042 toc13
REG5 VOLTAGE vs. REG5 LOAD CURRENT
VREG15 = 20V 5.0 VREG5 (V)
MAX5042 toc14
9.30 VREG15 = 20V 9.25 9.20 VREG9 (V)
9.4 VPOSINPWM = 48V 9.3 VREG9 (V)
5.1
9.15 9.10
9.2
4.9
9.1 9.05 9.00 0 10 20 30 40 REG9 LOAD CURRENT (mA) 9.0 20 25 30 REG15 VOLTAGE (V) 35 40
4.8
4.7 0 4 8 12 16 20 REG5 LOAD CURRENT (mA)
REG5 OUTPUT VOLTAGE vs. REG15 VOLTAGE
VPOSINPWM = 48V 5.01
MAX5042 toc15
SOFT-START CURRENT vs. TEMPERATURE
MAX5042 toc16
MINIMUM RCFF LEVEL, MINIMUM OPTO LEVEL vs. TEMPERATURE
MAX5042 toc17
5.02
33 32 SOFT-START CURRENT (A) 31 30 29 28 27
3.0 2.5 VRCFF VOPTO, VRCFF (V) 2.0 VOPTO 1.5 1.0 0.5 0
VREG5 (V)
5.00
4.99
4.98
IPULLUP INTO OPTO AND RCFF = 2mA, CSS = 0 -50 -25 0 25 50 75 100 125
4.97 20 25 30 REG15 VOLTAGE (V) 35 40
-50
-25
0
25
50
75
100
125
TEMPERATURE (C)
TEMPERATURE (C)
8
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Two-Switch Power ICs with Integrated Power MOSFETs and Hot-Swap Controller
Typical Operating Characteristics (continued)
(VPOSINPWM = 20V, TA = +25C, unless otherwise noted.)
MAX5042/MAX5043
CURRENT-LIMIT THRESHOLD vs. TEMPERATURE
MAX5042 toc18
CURRENT-LIMIT PROPAGATION DELAY vs. TEMPERATURE
MAX5042 toc19
CPWM PROPAGATION DELAY vs. TEMPERATURE
MAX5042 toc20
160 CURRENT-LIMIT THRESHOLD (mV)
170 CURRENT-LIMIT PROPAGATION DELAY (ns) 160 150 140 130 120 110 100 MEASURED FROM CSP RISING TO XFRMRL RISING -50 -25 0 25 50 75 100
180 CPWM PROPAGATION DELAY (ns)
158
160
156
140
154
120
152
100 MEASURED FROM RAMP RISING TO XFRMRL RISING -50 -25 0 25 50 75 100 125
150 -50 -25 0 25 50 75 100 125 TEMPERATURE (C)
80 125
TEMPERATURE (C)
TEMPERATURE (C)
PPWM TO XFRMRL SKEW vs. RDRVDEL
MAX5042 toc21
CSA OFFSET vs. TEMPERATURE
MAX5042 toc22
FAULT INTEGRATION CURRENT vs. TEMPERATURE
MAX5042 toc23
300 PPWM TO POWER PULSE SKEW (ns)
220
80 FAULT INTEGRATION CURRENT (A)
260
79
215 220 CSA OFFSET (mV)
78
210
180
77
140 MEASURED FROM PPWM RISING TO XFRMRL FALLING 100 10 20 30 40 50 60 70 80 RDRVDEL (k)
205
76
200 -50 -25 0 25 50 75 100 125 TEMPERATURE (C)
75 -50 -25 0 25 50 75 100 125 TEMPERATURE (C)
FAULT INTEGRATION SHUTDOWN VOLTAGE vs. TEMPERATURE
MAX5042 toc24
FAULT INTEGRATION RESTART VOLTAGE vs. TEMPERATURE
MAX5042 toc25
POWER FETs ON-RESISTANCE vs. TEMPERATURE
MAX5042 toc26
FAULT INTEGRATION SHUTDOWN VOLTAGE (V)
2.8
2.00 FAULT INTEGRATION RESTART VOLTAGE (V)
140 POWER FETs ON-RESISTANCE ()
2.7
1.95
120
100 HIGH-SIDE FET 80 LOW-SIDE FET 60
2.6
1.90
2.5
1.85
2.4 -50 -25 0 25 50 75 100 125 TEMPERATURE (C)
1.80 -50 -25 0 25 50 75 100 125 TEMPERATURE (C)
40 -50 -25 0 25 50 75 100 125 TEMPERATURE (C)
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9
Two-Switch Power ICs with Integrated Power MOSFETs and Hot-Swap Controller MAX5042/MAX5043
Pin Description
PIN MAX5042 1, 2, 14, 15, 40, 42-45, 56 MAX5043 1, 2, 14, 15, 40, 42-45, 56 NAME N.C. FUNCTION No Connection. Not internally connected. Voltage-Mode PWM Ramp. Connect a resistor to the input supply and a capacitor to PWMNEG for input voltage feed-forward. Input voltage feed-forward provides instantaneous input-voltage transient rejection and constant loop gain with varying input voltage. PWM Ramp Input. For voltage-mode control, connect RAMP to RCFF. For currentmode control, connect RAMP to CSOUT, the output of the current-sense amplifier. Inverting Input of the PWM Comparator. Connect OPTO to the collector of the optotransistor. Connect a pullup resistor from OPTO to REG5. Soft-Start. Connect a capacitor from CSS to PWMNEG to soft-start the converter. Boost-Capacitor Bypass for High-Side MOSFET Gate Drive. Connect a 0.1F capacitor from BST to XFRMRH for the internal high-side MOSFET driver. Low-Side MOSFET Driver Supply. Bypass DRVIN with a 0.22F capacitor to PWMPNEG. Low-Side MOSFET Driver Return. Connect PWMPNEG externally to PWMNEG with a short trace. Oscillator Timing Resistor and Capacitor Connection. Connect a capacitor from RCOSC to PWMNEG and a resistor from RCOSC to REG5. The switching frequency is half the frequency of the sawtooth signal at this connection. Fault Integration Input. Use FLTINT in addition to cycle-by-cycle current limit. During persistent current-limit faults, a capacitor connected to FLTINT charges with an internal 80A current source. Switching terminates when the voltage reaches 2.7V. An external resistor connected in parallel discharges the capacitor. Switching resumes when the voltage drops to 1.8V. Synchronization Input. The switching frequency of the power supply is half the synchronization frequency, ensuring less than 50% maximum duty cycle. Latched Shutdown Input. Pull PWMSD low with respect to PWMNEG to stop switching. To restart, release PWMSD and cycle the input supply. Do not leave PWMSD unconnected. Use PWMSD to prevent catastrophic secondary rectifier overheating by monitoring the temperature and issuing a shutdown command with an optocoupler. Connect PWMSD to REG5 when not used. Source Connection for the Internal Low-Side Power MOSFET. Connect SRC to PWMPNEG with a low-value resistor for current limiting. Low-Side Connection for the Isolation Transformer Hot-Swap Controller Positive Input Supply (MAX5042 Only). Connect POSINHS along with POSINPWM to the most positive rail of the input supply.
3
3
RCFF
4 5 6 7 8 9
4 5 6 7 8 9
RAMP OPTO CSS BST DRVIN PWMPNEG
10
10
RCOSC
11
11
FLTINT
12
12
SYNC
13
13
PWMSD
16, 17, 20, 21, 24
16, 17, 20, 21, 24
SRC XFRMRL POSINHS
18, 19, 22, 23 18, 19, 22, 23 25 --
10
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Two-Switch Power ICs with Integrated Power MOSFETs and Hot-Swap Controller
Pin Description (continued)
PIN MAX5042 26 MAX5043 -- NAME HSOK FUNCTION Hot-Swap OK (MAX5042 Only). HSOK's open-drain output is forced to NEGIN upon hot-swap completion. Hot-Swap Enable (MAX5042 Only). HSEN is the center point of the internal hot-swap UVLO divider. Use an external voltage-divider or a 100k pullup resistor to the most positive rail to override. Negative Supply Input (MAX5042 Only). NEGIN connects to the most negative input supply rail. NEGIN provides the hot-swap circuit's most negative connection. NEGIN is at the same potential as the IC substrate. Hot-Swap Gate (MAX5042 Only). Connect HSGATE to the gate of the external hotswap MOSFET. Hot-Swap MOSFET Drain Sense (MAX5042 Only). Connect HSDRAIN to the drain of the external hot-swap MOSFET. Current-Sense Amplifier Output. The amplifier has a gain of 10. Connect CSOUT to RAMP for current-mode control. Positive Current-Sense Connection. Place the current-sense resistor as close as possible to the device and use a Kelvin connection. Negative Current-Sense Connection. Place the current-sense resistor as close as possible to the device and use a Kelvin connection. Analog Signal Return for the PWM Section Driver Delay Adjust Connection. Connect a resistor and a 0.22F capacitor from DRVDEL to PWMNEG. The resistor at DRVDEL controls the skew between the PPWM signal and the power pulse applied to the internal power MOSFETs. Use in conjunction with a secondary-side synchronous-rectifier controller. The skew allows for the optimization of the synchronous-rectifier drive pulse. PWM Pulse Output. PPWM leads the internal power MOSFET pulse by an amount determined with the resistor value at DRVDEL. 9V Internal Regulator Output. Use primarily as a source for the internal gate drivers. Bypass REG9 to PWMNEG with a 1F ceramic capacitor. 5V Internal Regulator Output. Bypass REG5 to PWMNEG with a 1F ceramic capacitor. 15V Startup Regulator Output. A voltage greater than 18V on REG15 disables the regulator. Bypass REG15 to PWMNEG with at least one 1F ceramic capacitor. PWM Undervoltage Lockout. UVLO is the center point of the PWM undervoltage lockout divider. Use an external divider or a 100k pullup resistor to POSINPWM to override. Connect the external resistor-divider network from POSINPWM to PWMNEG.
MAX5042/MAX5043
27
--
HSEN
28, 29
--
NEGIN
30 31 32 33 34 35
-- -- 32 33 34 26, 28, 29, 31, 35
HSGATE HSDRAIN CSOUT CSP CSN PWMNEG
36
36
DRVDEL
37 38 39 41
37 38 39 41
PPWM REG9 REG5 REG15
46
46
UVLO
______________________________________________________________________________________
11
Two-Switch Power ICs with Integrated Power MOSFETs and Hot-Swap Controller MAX5042/MAX5043
Pin Description (continued)
PIN MAX5042 47 MAX5043 25, 47 NAME POSINPWM DRNH XFRMRH DEN N.C. FUNCTION PWM Analog Positive-Supply Input. Connect POSINPWM to the most positive input supply rail. Drain Connection of the Internal High-Side PWM Power MOSFET. Connect DRNH to the most positive rail of the input supply. High-Side Connection for the Isolation Transformer Delayed Enable Input (MAX5043 Only). DEN is the center point of the delayed enable divider. Use an external voltage-divider or a 100k pullup resistor to the most positive rail to override. No Connection (MAX5043 Only). Leave unconnected.
48, 51, 54, 55 48, 51, 54, 55 49, 50, 52, 53 49, 50, 52, 53 -- -- 27 30
Detailed Description
The MAX5042/MAX5043 PWM multimode power ICs are designed for the primary side of voltage or currentmode isolated, forward or flyback power converters. These devices provide a high degree of integration aimed at reducing the cost and PC board area of isolated output power supplies. Use the MAX5042/MAX5043 primarily for 24V, 42V, or 48V power bus applications. The MAX5042/MAX5043 provide a complete system capable of delivering up to 50W of output power. The MAX5042 contains a hot-swap controller in addition to the PWM and power MOSFETs. The hot-swap section requires an external MOSFET (QHS). Figure 1 details the MAX5042 conceptual block diagram. CIN represents the input bulk storage capacitance of the PWM circuit that requires the soft-start to reduce the inrush current from the backplane. When input power is applied, capacitor CIN is completely discharged and QHS is off. An applied voltage higher than the default undervoltage lockout threshold of the hot-swap controller (30.5V) for more than 165ms (internal turn-on delay) causes the gate voltage of QHS to start gradually increasing. This results in a controlled slew-rate turn-on. The drain voltage of QHS falls at a rate of approximately 10V/ms, drawing a current load from the backplane of approximately 1A for each 100F of C IN capacitance. The MAX5042's PWM block is prevented from starting up until the QHS MOSFET is fully enhanced. After QHS completely turns on and the voltage across capacitor CIN is above the default startup voltage (31V) of the PWM section, the hot swap enables the PWM block and the soft-start cycle begins. Soft-start limits the amount of current initially drawn from the primary during startup and also prevents possible output-voltage overshoots.
+VPOSINPWM
MAX5042
QH CIN PWM CIRCUIT WITH INTEGRATED FETs QL T1
BULK STORAGE CAPACITOR (HOT-SWAPPED CAPACITOR) L VOUT COUT
PWMNEG, PWMPNEG QHS INTEGRATED HOT-SWAP CONTROLLER NEGIN EXTERNAL HOT-SWAP FET
Figure 1. Simplified Diagram of a MAX5042-Based Isolated Power Supply
The MAX5043, detailed in Figure 2, does not contain an integrated hot-swap controller. The MAX5043 begins operating when the input voltage exceeds both of the undervoltage lockout voltages (at UVLO and DEN pins) for 10ms. The MAX5042/MAX5043 support both forward and flyback power topologies. In forward mode, the maximum output power is approximately 50W. In flyback mode, the maximum output power is approximately 20W. The amount of power dissipated by the package limits the output power. The MAX5042/MAX5043's QFN package features an exposed metal pad on the bottom of the package. Solder the exposed pad directly to the most negative supply in the system. Use a large copper area to improve heat dissipation. Facilitate heat transfer with thermal vias.
12
______________________________________________________________________________________
Two-Switch Power ICs with Integrated Power MOSFETs and Hot-Swap Controller
Power Topology
+VPOSINPWM
MAX5042/MAX5043
MAX5043
QH CIN PWM CIRCUIT WITH INTEGRATED FETs QL T1 BULK STORAGE CAPACITOR L VOUT COUT
The two-switch forward-converter topology offers outstanding robustness against faults and transformer saturation while affording efficient use of the integrated 75m power MOSFETs. Voltage-mode control with feedforward compensation allows the rejection of input supply disturbances within a single cycle similar to that of current-mode controlled topologies. This control method offers some significant benefits when compared with current-mode control. These benefits include: * No minimum duty-cycle requirement due to currentsignal filtering or blanking. * Clean modulator ramp and higher amplitude for increased stability. * Stable bias point of the optocoupler LED and phototransistor for maximized control-loop bandwidth (in current-mode applications, the optocoupler bias point is output-load dependent). * Predictable loop dynamics simplifying the design of the control loop. The two-switch power topology recovers energy stored in both the magnetizing and parasitic leakage inductances of the transformer. Figure 7 shows the schematic diagram of a 48V input and 5V, 8A output isolated power supply built with the MAX5042. The MAX5042/MAX5043 also support current-mode control. Current-mode control has advantages such as a single-pole power circuit and a small-signal transfer function that simplify the design of power supplies with widely varying output capacitors.
PWMNEG
Figure 2. Simplified Diagram of a MAX5043-Based Isolated Power Supply
Set the switching frequency with a resistor and a capacitor at RCOSC. Switching at 250kHz ensures switching losses are minimal and external power passives are small enough for a compact circuit. The MAX5042/MAX5043 incorporate an advanced set of protection features that make them uniquely suitable when high reliability and comprehensive fault protection are required, as in telecommunication equipment powersupply applications. The MAX5042/MAX5043 15V linear regulator output powers the 9V and 5V regulators used to drive the gates and internal circuitry. A tertiary winding connects to REG15 through a rectifier to power the device after startup and reduces power dissipation in the MAX5042/MAX5043 package. When REG15 is externally powered, the internal 15V regulator is disabled. Figures 3 and 4 show the block diagrams of the MAX5042 and MAX5043, respectively. The power-OK signals from the hot-swap section, regulators, thermal shutdown, and UVLO combine to generate the internal shutdown signal SHDN. When asserted, SHDN disables the comparators and oscillator. Deasserting SHDN releases the comparators and oscillators. The falling edge of SHDN is delayed allowing the internal signals to settle before the PWM pulses appear. During the time between the falling edge of SHDN and its delayed signal, the 10 internal MOSFET (QB) from XFRMRH to PWMPNEG turns on, charging the BST capacitor. After startup, this MOSFET also turns on for approximately 300ns at each half period to help charge the BST capacitor.
Undervoltage Lockout
The MAX5042 has two UVLO functions. Both the hotswap section and the PWM section contain their own undervoltage lockout comparators (HSEN and UVLO, respectively). The MAX5043 lacks the hot-swapping function, but retains the PWM UVLO and the deglitched undervoltage lockout/power-on reset. In both cases, internal resistors set a default input-voltage enable threshold of 31V (typ). The PWM default input voltage threshold value can be adjusted by using an external divider in parallel with the internal divider. The tolerances of the external divider resistors dominate the precision of the UVLO trip point if their values are smaller than those of the internal divider. Override the default threshold by using: RHe = VREF x RHi (RLi + RLe ) - RLe x RLi x (VIN - VREF ) RLe x RLi x RHi x (VIN - VREF )
______________________________________________________________________________________
13
Two-Switch Power ICs with Integrated Power MOSFETs and Hot-Swap Controller MAX5042/MAX5043
REG15
41
MAX5042
REG15 OK
REG15 (15V)
OVT
47
POSINPWM
REG5 REG9 RCFF
39 REG5 OK 38 3 5V IFLT 80A 11
REG5 (5V)
REG9 OK REG15 OK
REG9 (9V)
REG5 OK
REF OK
REF (1.25V) UVLO CUVLO 1.25V 1.125V
1.2M 46 7.5V UVLO
50k PWMNEG
"1" 7.5V Q OVRLD R 2.3V/1.6V D PWMNEG LEVEL SHIFT RES QH 0.1
37 36 7 48
PPWM DRVDEL BST DRNH (51, 54, 55)
FLTINT
RAMP OPTO
4 5 5V CLK 32A 6 Q R T-FF CPWM
R S
Q
LEADINGEDGE DELAY
49
XFRMRH (50, 52, 53)
SHDN OSC LEADINGEDGE DELAY THERMAL SHUTDOWN +150C 12C HYSTERESIS ONE SHOT QB 10
CSS
7.5V PWMNEG 35
PWMNEG PWMSD 13 UVLO R S Q
OVT UVLO REFOK REG15OK REG9OK REG5OK OVRLD
8 OVT QL 0.1 18
DRVIN XFRMRL (19, 22, 23)
16 9 10
SRC (17, 20, 21, 24) PWMPNEG RCOSC
12
SYNC
33 ILIM 150mV 32 GAIN = 10 IAMP LEVEL SHIFT TO PWM POSINHS 25 840k HSEN 27 HOT-SWAP CONTROL LOGIC 200mV 10MHz 34
CSP CSN
CSOUT
HOT-SWAP SECTION 31 30 26 40 80V, DMOS HSDRAIN HSGATE HSOK
35k NEGIN (29) 28
3V
460k
Figure 3. Block Diagram of the MAX5042 Power IC 14 ______________________________________________________________________________________
Two-Switch Power ICs with Integrated Power MOSFETs and Hot-Swap Controller MAX5042/MAX5043
REG15
41
MAX5043
REG15 OK
REG15 (15V)
OVT
47
POSINPWM
REG5 REG9 RCFF
39 REG5 OK 38 3 5V IFLT 80A 11 2.3V/1.6V
REG5 (5V)
REG9 OK REG15 OK
REG9 (9V)
REG5 OK
REF OK
REF (1.25V) UVLO CUVLO 1.25V 1.125V
1.2M 46 7.5V UVLO
50k PWMNEG
"1" 7.5V Q OVRLD R R CPWM S Q LEADINGEDGE DELAY RES D 3
37 36 7 PWMNEG LEVEL SHIFT QH 0.1 48
PPWM DRVDEL BST DRNH (51, 54, 55)
FLTINT
RAMP OPTO
4 5 5V CLK 32A 6 Q R T-FF
49
XFRMRH (50, 52, 53)
SHDN OSC LEADINGEDGE DELAY THERMAL SHUTDOWN +150C 12C HYSTERESIS ONE SHOT QB 10
CSS
7.5V PWMNEG (26) 35 50
PWMNEG PWMSD 13 UVLO R S Q
OVT UVLO REFOK REG15OK REG9OK REG5OK OVRLD
8 OVT QL 0.1 18
DRVIN XFRMRL (19, 22, 23)
16 9 10
SRC (17, 20, 21, 24) PWMPNEG RCOSC
12
SYNC
33 ILIM 150mV 32 GAIN = 10 IAMP 200mV 10MHz 34
CSP CSN
CSOUT
POSINPWM
25 840k
DEN
27 1.25V 3V 1.125V CDEN 10ms DELAY
35k PWMNEG (29, 31) 28
Figure 4. Block Diagram of the MAX5043 Power IC ______________________________________________________________________________________ 15
Two-Switch Power ICs with Integrated Power MOSFETs and Hot-Swap Controller MAX5042/MAX5043
where RHe is the external high-side resistor, RLe is the external low-side resistor, RHi is the internal high-side resistor (1.2M, typ), RLe is the internal low-side resistor (50k, typ), VREF is 1.27V (typ), and VIN is the desired threshold. Use an external 100k pullup resistor to POSINPWM to override UVLO functionality for either lockout.
MAX5042/MAX5043
DRVDEL C1 0.22F R2 PPWM 5V
R1
Internal Regulators
An internal high-voltage linear regulator provides a 15V output at REG15. This serves as the input to the 9V regulator that provides bias for the internal MOSFET drivers. The 15V regulator also provides the bias for REG5, a 5V supply used both by internal as well as external circuitry. Bypass the REG15, REG9, and REG5 regulators with 1F ceramic capacitors. A voltage greater than 18V and less than 40V on REG15 disables the internal highvoltage startup regulator. The REG9 regulator steps down the voltage on REG15 to an output of 9V with a current limit of 100mA. The REG5 regulator steps down the voltage on REG15 to an output of 5V with a current limit of 40mA. Disabling the REG15 regulator by powering REG15 with an external power supply considerably reduces the internal power dissipation in the MAX5042/MAX5043. The voltage and power necessary to override the REG15 internal regulator can be generated with a rectifier and an extra winding from the main transformer.
C2 PWMNEG PS9715 OR EQUIVALENT HIGH-SPEED OPTOCOUPLER
Figure 5. Secondary-Side Synchronous Rectifier Driver Using a High-Speed Optocoupler
required to set the delay between the PPWM and the power pulse applied to the transformer: k RDRVDEL = t DRVDEL - (100ns) 2ns
(
)
where tDRVDEL is the required delay from the rising edge of PPWM to the switching of the internal power MOSFETs.
PWM Regulation
The MAX5042/MAX5043 are multimode PWM power ICs supporting both voltage and current-mode control. Voltage-Mode Control and the PWM Ramp For voltage-mode control, the feed-forward PWM ramp is generated at RCFF. From RCFF connect a capacitor to PWMNEG and a resistor to POSINPWM. The ramp generated is applied to the noninverting input of the PWM comparator at RAMP and has a minimum voltage of 1.5V to 2.5V. The slope of the ramp is determined by the voltage at POSINPWM and affects the overall loop gain. The ramp peak must remain below the dynamic range of RCFF (0 to 5.5V). Assuming the maximum duty cycle approaches 50% at a minimum input voltage (PWM UVLO turn-on threshold), use the following formula to calculate the minimum value of either the ramp capacitor or resistor: RRCFF x CRCFF VINUVLO 2 fS x VrP-P
Soft-Start
Program the MAX5042/MAX5043 soft-start with an external capacitor between CSS and PWMNEG. When the device turns on, the soft-start capacitor (C CSS) charges with a constant current of 33A, ramping up to 7.3V. During this time, OPTO is clamped to CSS + 0.6V. This initially holds the duty cycle lower than the value the regulator tries to impose, limiting the current inrush and the voltage overshoot at the secondary. When the MAX5042/MAX5043 turn off, the soft-start capacitor internally discharges to PWMNEG.
Secondary-Side Synchronization
The MAX5042/MAX5043 provide convenient synchronization of the secondary-side synchronous rectifiers. Figure 5 shows the connection diagram with a highspeed optocoupler. Choose an optocoupler with a propagation delay of less than 50ns. For optimum results, adjust the resistor connected to DRVDEL to provide the required amount of delay between the leading edge of the PPWM signal and the turn-on of the power MOSFETs. Use the following formula to calculate the approximate resistance (RDRVDEL)
where: VINUVLO = the minimum input supply voltage (typically the PWM UVLO turn-on voltage), fs = the switching frequency, VrP-P = the peak-to-peak ramp voltage (2V, typ).
16
______________________________________________________________________________________
Two-Switch Power ICs with Integrated Power MOSFETs and Hot-Swap Controller
Maximize the signal-to-noise ratio by setting the ramp peak as high as possible. Calculate the low-frequency, small-signal gain of the power stage (the gain from the inverting input of the PWM comparator to the output) using the following formula: GPS = NSP RRCFF CRCFF fS where NSP = the secondary to primary power transformer turns ratio. Current-Sense Amplifier and Current-Mode Control The MAX5042/MAX5043 can also be programmed for current-mode control (see Figure 6). This control method offers beneficial advantages for certain applications. Current-mode control reduces the order of the output filter, allowing easier control-loop compensation. In current-mode control, the voltage across the currentsense resistor at SRC is amplified by the internal gainof-10 amplifier IAMP. The cycle-by-cycle current-limit threshold is 156mV. This is the peak voltage amplified by IAMP. A 200mV offset is added to this voltage. The voltage at the output of the current-sense amplifier is: VCSOUT = 2 + 10(VCSP - VCSN) The low-frequency, small-signal gain of the power stage (the gain from the inverting input of the PWM comparator to the output) can be calculated using the following formula: GPS = NPS x RL RSENSE
Oscillator and Synchronization
Program the MAX5042/MAX5043 oscillator using an RC network at RCOSC with the resistor connected to REG5 and the capacitor connected to PWMNEG. The PWM frequency is half the frequency at RCOSC. Use the following formula to calculate the oscillator components:
RRCOSC = 1 VREG5 2 fS (CRCOSC + CPCB )ln VREG5 - VTH
MAX5042/MAX5043
where CPCB = 14pF, REG5 = 5V, fS = switching frequency, VTH = RCOSC peak trip level. The delay programmed by the resistor at DRVDEL limits the power MOSFET's maximum duty cycle to less than 50 percent. SYNC allows synchronization of the MAX5042/MAX5043 to an external clock. For proper synchronization, set the external SYNC frequency 15% to 20% higher than the programmed free-running frequency of the MAX5042/ MAX5043's internal oscillator. The actual switching frequency will be half the synchronizing frequency.
Integrating Fault Protection
The integrating fault protection feature allows the MAX5042/MAX5043 to ignore transient overcurrent conditions for a programmable amount of time, giving the power supply time to behave like a current source to the load. This can happen, for example, under loadcurrent transients when the control loop requests maximum current to keep the output voltage from going out of regulation. Program the ignore time externally by connecting a capacitor to FLTINT. Under sustained overcurrent faults, the voltage across this capacitor ramps up toward the FLTINT shutdown threshold (typically 2.7V). When FLTINT reaches the threshold, the power supply shuts down. A high-value bleed resistor connected in parallel with the FLTINT capacitor allows the capacitor to discharge toward the restart threshold (typically 1.8V). Crossing the restart threshold softstarts the supply again. The ILIM comparator provides cycle-by-cycle current limiting with a typical threshold of 156mV. The fault integration circuit works by forcing an 80A current out of FLTINT for one clock cycle every time the current-limit comparator (Figures 3 and 4, ILIM) trips. Use the following formula to calculate the approximate capacitance (CFLTINT) needed for the desired shutdown time.
17
where NPS = the primary to secondary power transformer turns ratio, RL = the low-frequency output impedance, RSENSE = the primary current-sense resistor value.
MAX5042/MAX5043
SRC RAMP CSOUT OPTO CSN PWMPNEG PWMNEG CSP RS 50m (APPROXIMATELY 35W TO 40W)
Figure 6. Simplified Connection Diagram for Current-Mode Control
______________________________________________________________________________________
Two-Switch Power ICs with Integrated Power MOSFETs and Hot-Swap Controller MAX5042/MAX5043
I xt CFLTINT FLTINT SH 1.4 where IFLTINT = 80A, tsh is the desired ignore time during which current-limit events from the current-limit comparator are ignored. Some testing may be required to fine tune the actual value of the capacitor. Calculate the approximate bleed resistance (RFLTINT) needed for the desired recovery time using the following formula: tRT RFLTINT 2.3 CFLTINT ln 1.6 where tRT is the desired recovery time. Choose at least tRT = 10 x tSH. Typical values for tSH range from a few hundred microseconds to a few milliseconds. Thermal Shutdown The MAX5042/MAX5043 feature internal thermal shutdown. Internal sensors monitor the high-power areas. Thermal faults arise from excessive dissipation in the power FETs or in the regulators. When the temperature limit is reached, switching is terminated and the regulator shuts down. The integration of thermal shutdown and the power MOSFETs result in a very robust power circuit.
MAX5042 Hot-Swap Controller
The MAX5042 integrates a PWM power IC with a hotswap controller. The design allows a power supply built around the MAX5042 to be safely hot-plugged into a live backplane without causing a glitch on the powersupply rail. The hot-swap section operates from POSINHS to NEGIN. The MAX5042 only requires an external N-channel MOSFET to provide hot-swap control. Figures 1 and 3 detail hot-swap functionality. The MAX5042 controls an external N-channel power MOSFET placed in the negative power-supply pathway. When power is applied, the MAX5042 keeps the MOSFET off. The MOSFET remains off indefinitely if HSEN is below 1.26V, POSINHS is below the undervoltage lockout level (31V), or the die temperature exceeds +150C. If none of these conditions exist for 165ms, the MAX5042 gradually turns on the MOSFET, allowing the voltage on HSDRAIN to fall no faster than 10V/ms. During this period, the PWM block remains in shutdown. The inrush current through the external MOSFET (and therefore through the capacitor CIN) is limited to a level proportional to its capacitance, and the constant HSDRAIN slew rate. After the MOSFET completely turns on, and HSDRAIN falls to its final value, the hot-swap period is terminated and the PWM section of the IC powers up. HSEN offers external control of the MAX5042, facilitating power-supply sequencing. HSEN can also be used to change the undervoltage lockout level using an external divider network, if necessary. Undervoltage lockout keeps the external hot-swap MOSFET switched off as long as the magnitude of the input voltage is below the desired level. There is a 10ms turn-off delay on the HSEN signal. A power-good output, HSOK, asserts when the external MOSFET completely turns on. HSOK is an open-drain output referenced to NEGIN, and can withstand up to 80V above NEGIN.
Shutdown Modes
Latched Shutdown The MAX5042/MAX5043 feature a latched shutdown that terminates switching in the event of a serious fault. External faults in synchronously rectified power supplies cause a loss of control for the rectifiers. Either the body or the external Schottky diodes conduct, resulting in a very high power dissipation and a quick rise of the power-supply temperature. A thermal sensor placed on the same ground plane as the secondary-side rectifiers can sense this catastrophic increase in temperature and issue a shutdown signal to PWMSD. Asserting PWMSD stops switching and latches the fault until the power is cycled. Connect PWMSD to REG5 to disable latched shutdown. Functional Shutdown Shut down the MAX5042/MAX5043 by pulling UVLO to PWMNEG using an open-collector or open-drain transistor connected to PWMNEG. Pulling HSEN to NEGIN also shuts down the MAX5042 after a 10ms turn-off delay. Pulling DEN low also shuts down the MAX5043 with a 1ms turn-off delay. When HSEN is used, the MAX5042 goes through a full hot-swap startup sequence with a 165ms startup delay. The MAX5043 also has a 10ms delay from when DEN asserts.
18
______________________________________________________________________________________
Two-Switch Power ICs with Integrated Power MOSFETs and Hot-Swap Controller
Determining Hot-Swap Inrush Current Calculate the hot-swap inrush current using the following formula: ICIN dV = CIN HSDRAIN = CINSHSLR dt
MAX5042/MAX5043
Table 1. MAX5042 Suggested External Hot-Swap MOSFETs
MAXIMUM ILOAD (A) 0.25 0.5 1 2 3 4 SUGGESTED EXTERNAL MOSFET IRFL110 IRFL4310 IRFR3910 IRF540NS IRF1310NS IRF1310NS
where: CIN = the load capacitance, SHSLR is the MAX5042 hot-swap slew rate magnitude given in the Electrical Characteristics table. For example, assuming an input bulk capacitance of 100F, and using the typical value of 10V/ms for the slew rate, the calculated inrush current is 1A. See Table 1 for suggested external hot-swap MOSFETs.
Typical Application Circuits
VIN+ 32V TO 72V
C1 220F 100V
R12 200k 1% RAMP RCFF REG9 DRVIN FLTINT DRVDEL SYNC PWMSD
POSINPWM
DRNH
UVLO
BST XFRMRH
C6 0.1F
D1 T1
D3
L1 4.4H 5V 8A C17 150F 6.3V C18 150F 6.3V C4 0.1F SGND
U1 XFRMRL
R22 10k C30 0.68F 100V C3 1F C9 C12 220pF 0.1F R13 1M R14 10k C25 0.22F R20 10k
MAX5042
REG15
R9 15 C7 1F
R11 20 1% C16 0.001F D4 D2 C5 0.0047F
CSP, SRC REG5 RCOSC HSEN CSS R15 24.9k 1% C13 1F C14 100pF NEGIN HSGATE PWMNEG, HSDRAIN CSN PWMPNEG OPTO R4 10
C11 0.1F
R10 33m 1% C19 0.15F C8 0.33F R6 200 1% C R3 150 1% LED FB U2 FOD2712 COMP GND R5 10 1% C15 0.1F R1 25.5k 1%
C20 0.1F 100V NEGIN
N1 (HOT-SWAP MOSFET) R21 1.24k 1%
E
R2 8.25k 1%
Figure 7. MAX5042 Typical Application Circuit (48V Power Supply with Hot-Swap Capability)
______________________________________________________________________________________
19
Two-Switch Power ICs with Integrated Power MOSFETs and Hot-Swap Controller MAX5042/MAX5043
Typical Application Circuits (continued)
VIN+ 32V TO 72V
C1 220F 100V
R12 200k 1% RAMP RCFF REG9 DRVIN FLTINT DRVDEL SYNC PWMSD
POSINPWM
DRNH
UVLO
BST XFRMRH
C6 0.1F
D1 T1
D3
L1 4.4H 5V 10A C17 150F 6.3V C18 150F 6.3V C4 0.1F SGND
U1 XFRMRL
R22 10k 0.68F 100V C13 1F C9 C12 220pF 0.1F R13 1M R14 10k C25 0.22F R20 10k
MAX5043
REG15
R9 15 C7 1F
D4
D2
REG5 RCOSC R15 24.9k 1% C13 1F C14 100pF CSS PWMNEG
PWMNEG, CSN
OPTO SRC, CSP
R4 10
C11 0.1F
R10 33m 1% C19 0.15F C8 0.33F R6 200 1% C R3 150 1% LED FB U2 FOD2712 COMP GND R5 10 1% C15 0.1F R1 25.5k 1%
PWMNEG
E
R21 1.24k 1%
R2 8.25k 1%
Figure 8. MAX5043 Typical Application Circuit (48V Power Supply without Hot-Swap Capability, this Circuit has not been Tested)
20
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Two-Switch Power ICs with Integrated Power MOSFETs and Hot-Swap Controller
Pin Configurations
POSINPWM POSINPWM
MAX5042/MAX5043
TOP VIEW
XFRMRH XFRMRH XFRMRH XFRMRH DRNH DRNH DRNH DRNH N.C.
XFRMRH
XFRMRH
XFRMRH
XFRMRH
DRNH
DRNH
DRNH
DRNH
UVLO
UVLO
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
44
56
55
54
53
52
51
50
49
48
47
46
45
44
43
56
55
54
53
52
51
50
49
48
47
46
45
43
N.C. N.C. RCFF RAMP OPTO CSS BST DRVIN PWMPNEG
1 2 3 4 5 6 7 8 9
42 N.C. 41 REG15 40 N.C. 39 REG5 38 REG9 37 PPWM
N.C. N.C. RCFF RAMP OPTO CSS BST DRVIN PWMPNEG
N.C.
42 N.C. 41 REG15 40 N.C. 39 REG5 38 REG9 37 PPWM 36 DRVDEL 35 PWMNEG 34 CSN 33 CSP 32 CSOUT 31 PWMNEG 30 N.C. 29 PWMNEG 28
1 2 3 4 5 6 7 8 9
MAX5042ATN
36 DRVDEL 35 PWMNEG 34 CSN 33 CSP 32 CSOUT 31 HSDRAIN 30 HSGATE 29 NEGIN
MAX5043ETN
RCOSC 10 FLTINT 11 SYNC 12 PWMSD 13 N.C. 14
RCOSC 10 FLTINT 11 SYNC 12 PWMSD 13 N.C. 14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
15
16
17
18
19
20
21
22
23
24
25
26
27
XFRMRL
XFRMRL
XFRMRL
XFRMRL
XFRMRL
XFRMRL
XFRMRL
XFRMRL
POSINPWM
PWMNEG
THIN QFN
EXPOSED PADDLE CONNECTED TO NEGIN.
THIN QFN
EXPOSED PADDLE CONNECTED TO PWMNEG.
Chip Information
TRANSISTOR COUNT: 35,247 PROCESS: BiCMOS DMOS
______________________________________________________________________________________
PWMNEG
NEGIN
N.C.
POSINHS
HSEN
N.C.
SRC
SRC
SRC
SRC
SRC
HSOK
SRC
SRC
SRC
SRC
SRC
DEN
21
Two-Switch Power ICs with Integrated Power MOSFETs and Hot-Swap Controller MAX5042/MAX5043
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
56L THIN QFN.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
22 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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